Transactions of Nanjing University of Aeronautics & Astronautics
片上网络体系结构仿真和性能分析
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Abstract:
The network on chip (NoC) is used as a solution for the communication p roblems in a complex system on chip (SoC) design. To further enhance performance s, the NoC architectures, a high level modeling and an evaluat ion method based on OPNET are proposed to analyze their performances on differ ent injectio n rates and traffic patterns. Simulation results for general NoC in terms of the average latency and the throughput are analyzed and used as a guideline to make appropriate choices for a given application. Finally, a MPEG4 decoder is mapped on different NoC architectures. Results prove the effectiveness of the evalua tion method.
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Project Supported:
Supported by the Natural Science Foundation of China(61076019); the China Postdo ctoral Science Foundation(20100481134); the Natural Science Foundation of Jian gsu Province (BK2008387); the Graduate Student Innovation Foundation of Jiangsu Province (CX07B-105z).
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